RISC-V Snapdragon Wear by Qualcomm
Qualcomm and Google are extending their collaboration on wearables by developing a RISC-V Snapdragon Wear™ platform that will power next-generation Wear OS solutions. Work has begun and will continue, to ensure that applications and a robust software ecosystem for RISC-V will be available for commercial launches. This expanded framework will help pave the way for more products within the ecosystem to take advantage of custom CPUs that are low power and high performance. Leading up to this, the companies will continue to invest in Snapdragon Wear platforms as the leading smartwatch silicon provider for the Wear OS ecosystem. As an open-source instruction set architecture (ISA), RISC-V encourages innovation by allowing any company to develop completely custom cores. This allows more companies to enter the marketplace, which creates increased innovation and competition. RISC-V’s openness, flexibility, and scalability benefits the entire value chain – from silicon vendors to OEMs, end devi...